RedFlag2017's Stars
EbookFoundation/free-programming-books
:books: Freely available programming books
sindresorhus/awesome
😎 Awesome lists about all kinds of interesting topics
ohmyzsh/ohmyzsh
🙃 A delightful community-driven (with 2,400+ contributors) framework for managing your zsh configuration. Includes 300+ optional plugins (rails, git, macOS, hub, docker, homebrew, node, php, python, etc), 140+ themes to spice up your morning, and an auto-update tool that makes it easy to keep up with the latest updates from the community.
tiimgreen/github-cheat-sheet
A list of cool features of Git and GitHub.
nvie/gitflow
Git extensions to provide high-level repository operations for Vincent Driessen's branching model.
flameshot-org/flameshot
Powerful yet simple to use screenshot software :desktop_computer: :camera_flash:
nhivp/Awesome-Embedded
A curated list of awesome embedded programming.
gnuradio/gnuradio
GNU Radio – the Free and Open Software Radio Ecosystem
open-sdr/openwifi
open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software
stephane/libmodbus
A Modbus library for Linux, Mac OS, FreeBSD and Windows
jbush001/NyuziProcessor
GPGPU microprocessor architecture
pConst/basic_verilog
Must-have verilog systemverilog modules
basicmi/AI-Chip
A list of ICs and IPs for AI, Machine Learning and Deep Learning.
riscv-non-isa/riscv-asm-manual
RISC-V Assembly Programmer's Manual
pulp-platform/axi
AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
raysalemi/uvmprimer
Contains the code examples from The UVM Primer Book sorted by chapters.
ucb-bar/berkeley-hardfloat
VerificationExcellence/UVMReference
Reference examples and short projects using UVM Methodology
courageheart/AMBA_APB_SRAM
AMBA v.3 APB v.1 Specification Complaint Slave SRAM Core design and testbench. The testbench is developed using System Verilog and UVM and can be used as standalone Verification IP (VIP).
Arm-China/Model_zoo
Zhouyi model zoo
twilco/riscv-from-scratch
The code for the RISC-V from scratch blog post series.
hdl-util/mipi-csi-2
Capture images/video from a Raspberry Pi Camera (MIPI CSI-2) with an FPGA
darthsider/UART
UART design in SV and verification using UVM and SV
cpehle/ncore
A RISC-V processor in system verilog
arm-university/Smart-School-Projects
A collection of accessible and engaging projects for teachers and learners that utilise the more advanced features of Arduino in real-world contexts.
gaintpd/cutechess
Cute Chess is a graphical user interface, command-line interface and a library for playing chess. This Repo cantains the xiangqi, minixiangqi and manchu variant support
PulseRain/PulseRain_rtl_lib
PulseRain rtl library
austinharris/freedom
Source files for SiFive's Freedom platforms
dldldlfma/verilator_tutorial
RedFlag2017/freedom-u-sdk
Freedom Unleashed Software Development Kit