Issues
- 2
How to include in my own projects?
#77 opened by Nerotos - 3
Recoded format
#47 opened by leahyao - 1
- 1
- 4
dependencies issue
#79 opened by dzwduan - 12
- 0
- 8
Division/sqrt algorithm
#23 opened by sally-aha - 1
Mult for Mantissa
#35 opened by IAMAl - 1
How to compile it to verilog!
#59 opened by myjtag - 1
sbt test fail
#62 opened by pxs7 - 4
chisel3.Driver.execute is deprecated
#46 opened by edwardcwang - 0
Is Recoded Format more hardware-friendly for denormal numbers than IEEE754 format?
#57 opened by hyf6661669 - 3
Why RawModule instead of Module?
#44 opened by pentin-as - 4
compilation error
#43 opened by shi27feng - 0
make error
#39 opened by shiruizhao - 1
Where is hardfloat code
#34 opened by IAMAl - 2
Can you provide a detailed explanation of floating point division? The code is too hard to read.
#33 opened by zcy188 - 5
Question about arbitrary precision support
#32 opened by noureddine-as - 0
Printing value
#26 opened by apaj - 0
Recode format
#24 opened by sally-aha - 1
verilog simulator
#13 opened by ivanratkovic - 1
- 1
how to use DivSqrtRecFN_small.scala
#19 opened by Foutse - 5
FSqrt returns two valid responses for one input.
#15 opened by ccelio - 3
- 0
MulAddRecFN infinite loops in Chisel elaboration if called with the wrong inputs (expWidth, sigWidth)
#7 opened by ccelio