Pinned Repositories
AI_Hardware_Project_Template
AI Hardware Class Project Template
ArtyS7-RPU-SoC
Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.
black-parrot
A Linux-capable RISC-V multicore for and by the world
Blog
My blog :)
ChatroomApp
🥴A web chatroom app
learn-fpga
Learning FPGA, yosys, nextpnr, and RISC-V
RoPS
Rock Paper Scissor game for the NAO robot to improve human rhythm perception
UART_TX
A simple uart project implemented on FPGA
UXLP
UXLP2
YiminGao0113's Repositories
YiminGao0113/RoPS
Rock Paper Scissor game for the NAO robot to improve human rhythm perception
YiminGao0113/ArtyS7-RPU-SoC
Project for an RPU RISC-V system on chip implementation on the Digilent Arty S7-50 FPGA development board.
YiminGao0113/learn-fpga
Learning FPGA, yosys, nextpnr, and RISC-V
YiminGao0113/UART_TX
A simple uart project implemented on FPGA
YiminGao0113/UXLP
YiminGao0113/UXLP2
YiminGao0113/black-parrot
A Linux-capable RISC-V multicore for and by the world
YiminGao0113/Blog
My blog :)
YiminGao0113/ChatroomApp
🥴A web chatroom app
YiminGao0113/CS-Notes
:books: 技术面试必备基础知识、Leetcode、计算机操作系统、计算机网络、系统设计
YiminGao0113/Embedded_System
YiminGao0113/fifo
Generic FIFO implementation with optional FWFT
YiminGao0113/firmware-syntiant-tinyml
Edge Impulse firmware for Syntiant TinyML board
YiminGao0113/github-clone-all
Clone (~1000) repos matched to query on GitHub using Search API
YiminGao0113/iverilog
Icarus Verilog
YiminGao0113/leetcode
😏 LeetCode solutions in any programming language | 多种编程语言实现 LeetCode、《剑指 Offer（第 2 版）》、《程序员面试金典（第 6 版）》题解
YiminGao0113/litex
Build your hardware, easily!
YiminGao0113/litex-boards
LiteX boards files
YiminGao0113/MiniDiscord
A mini discord server 😋
YiminGao0113/OpenROAD-flow-scripts
OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation at https://openroad-flow-scripts.readthedocs.io/en/latest/
YiminGao0113/serv
SERV - The SErial RISC-V CPU
YiminGao0113/SIMD_Multipliers
YiminGao0113/SPI
SPI protocol modules in SystemVerilog
YiminGao0113/spi_master
YiminGao0113/subservient
Small SERV-based SoC primarily for OpenMPW tapeout
YiminGao0113/Super_SPI_Master_Verilog
SPI Master Verilog module
YiminGao0113/tt06-verilog-template
Submission template for Tiny Tapeout 06 - Verilog HDL Projects
YiminGao0113/verilog-uart
Verilog UART
YiminGao0113/vimrc
The ultimate Vim configuration (vimrc)
YiminGao0113/YiminGao0113.github.io
My web page XD