chipsalliance/verible

support for different type rule into kPortDeclaration

Opened this issue · 0 comments

Summary

Personally and in local I have inserted some rules that must follow the input/output ports to a module with also a prefix as matching.

However I find it very useful to have similar rules for the interfaces present in the kPortDeclaration section.

So as to distinguish and customize the rules for future uses.
I personally tried to decipher the syntax tree to obtain this but I run into some difficulties.
Can you explain the method to intercept the value in bold :

      Node @4 (tag: kPortDeclaration) {
        Node @2 (tag: kDataType) {
          Node @1 (tag: kInterfacePortHeader) {
            Node @0 (tag: kUnqualifiedId) {
              Leaf @0 (#SymbolIdentifier @586-592: )
            }
            Leaf @1 (#'.' @592-593: )
            Leaf @2 (#SymbolIdentifier @593-598:**"if_aaa"**)
          }
          Node @3 (tag: kPackedDimensions) {
          }
        }
        Node @3 (tag: kUnqualifiedId) {
          Leaf @0 (#SymbolIdentifier @599-602: "i_s")
        }
        Node @4 (tag: kUnpackedDimensions) {
        }
      }

Thanks in advance

interface if_aaa ();
        logic bbb;
endinterface

module ptr #(
        parameter int P = 32
        //....
     )
     (
        input wire i_upd,
        output wire o_rsp,
        if_aaa.slave i_s
     );
     //....
endmodule
// This variant should NOT be diagnosed (negative test case)

Proposal

Additional context