chipsalliance/verible

Is it possible to leave all lines whose beginning wasn't moved as they are? (i.e. to prevent any internal indentation within the line)

avidan-efody opened this issue · 0 comments

i.e. for this code:

class bla_c;
    parameter xxx               = 5;
    parameter yyy               = 6;
endclass

variable would give the following (I have tried all preserve options):

class bla_c;
    parameter xxx = 5;
    parameter yyy = 6;
endclass

Is it possible to leave these lines as they were since the beginning wasn't moved? i.e. :

class bla_c;
    parameter xxx               = 5;
    parameter yyy               = 6;
endclass