Pinned Repositories
caravel
Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.
caravel_board
caravel_mpw-one
Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.
caravel_user_project
https://caravel-user-project.readthedocs.io
caravel_user_project_analog
mpw_precheck
openframe_timer_example
Example digital project for the Efabless Caravel "openframe" harness
OpenLane
This repo is a fork of the master OpenLANE repo for us with projects submitted on Efabless Open MPW or chipIgnite shuttles:: OpenLANE is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen, Fault and custom methodology scripts for design exploration and optimization.
openlane2
The next generation of OpenLane, rewritten from scratch with a modular architecture
raven-picorv32
Silicon-validated SoC implementation of the PicoSoc/PicoRV32
efabless's Repositories
efabless/caravel
Caravel is a standard SoC harness with on chip resources to control and read/write operations from a user-dedicated space.
efabless/openlane2
The next generation of OpenLane, rewritten from scratch with a modular architecture
efabless/caravel_user_project
https://caravel-user-project.readthedocs.io
efabless/volare
Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs
efabless/cace
Circuit Automatic Characterization Engine
efabless/caravel_user_project_analog
efabless/chipcraft---mest-course
efabless/caravel_mgmt_soc_litex
https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/
efabless/ipm
Open-source IPs Package Manager (IPM)
efabless/nix-eda
Nix derivations for EDA tools
efabless/skywater-pdk-libs-sky130_fd_pr
efabless/openframe_timer_example
Example digital project for the Efabless Caravel "openframe" harness
efabless/sky130_pa_ip__instramp
Instrumentation amplifier in sky130 by Phil Allen
efabless/caravel-sim-infrastructure
efabless/EF_PSRAM_CTRL_V2
efabless/skywater-pdk-libs-sky130_fd_sc_hd
efabless/tt-fpga-hdl-demo
efabless/IHP-Open-PDK
130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design
efabless/cace-action
GitHub composite action for CACE
efabless/central_CI
efabless/EF_SRAM_4096x8
efabless/openlane-metrics
Repository to store metric results for OpenLane 2.0.0+
efabless/openlane2-step-unit-tests
Step-specific Unit Tests for OpenLane 2.0.0+
efabless/sky130_ef_ip__adc3v_12bit
12-bit ADC using other analog component repositories for the sample & hold, DAC, and comparator.
efabless/sky130_ef_ip__analog_switches
Set of analog switch circuits for general-purpose use
efabless/sky130_ef_ip__ccomp3v
Continuous analog comparator, 1mV resolution
efabless/sky130_ef_ip__cdac3v_12bit
12-bit capacitive DAC
efabless/sky130_ef_ip__opamp
Instrumentation amplifier (analog IP example)
efabless/sky130_ef_ip__samplehold
Analog 3.3V sample and hold circuit, with buffered output
efabless/sky130_ef_ip__template
A template repository for analog designs to ensure consistency and interoperability between IP blocks.