kurtlin's Stars
ggreer/the_silver_searcher
A code-searching tool similar to ack, but faster.
git-lfs/git-lfs
Git extension for versioning large files
secdev/scapy
Scapy: the Python-based interactive packet manipulation program & library.
dragen1860/TensorFlow-2.x-Tutorials
TensorFlow 2.x version's Tutorials and Examples, including CNN, RNN, GAN, Auto-Encoders, FasterRCNN, GPT, BERT examples, etc. TF 2.0版入门实例代码,实战教程。
pytransitions/transitions
A lightweight, object-oriented finite state machine implementation in Python with many extensions
chiphuyen/python-is-cool
Cool Python features for machine learning that I used to be too afraid to use. Will be updated as I have more time / learn more.
chipsalliance/rocket-chip
Rocket Chip Generator
blaze/blaze
NumPy and Pandas interface to Big Data
wavedrom/wavedrom
:ocean: Digital timing diagram rendering engine
liuchengxu/vim-clap
:clap: Modern performant fuzzy picker, tree-sitter highlighting, and more, for both Vim and NeoVim
moneymanagerex/moneymanagerex
Money Manager Ex is an easy to use, money management application built with wxWidgets
cocotb/cocotb
cocotb, a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python
chipsalliance/verible
Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server
MattesGroeger/vim-bookmarks
Vim bookmark plugin
twtrubiks/django-rest-framework-tutorial
Django-REST-framework 基本教學 - 從無到有 DRF-Beginners-Guide 📝
JalaliLabUCLA/Image-feature-detection-using-Phase-Stretch-Transform
PST or Phase Stretch Transform is an operator that finds features in an image. PST implemented using MATLAB here, takes an intensity image I as its input, and returns a binary image out of the same size as I, with 1's where the function finds sharp transitions in I and 0's elsewhere.
toomore/grs
📈 台灣上市上櫃股票價格擷取(Fetch Taiwan Stock Exchange data)含即時盤、台灣時間轉換、開休市判斷。
vhda/verilog_systemverilog.vim
Verilog/SystemVerilog Syntax and Omni-completion
stevehoover/warp-v
WARP-V is an open-source RISC-V CPU core generator written in TL-Verilog.
git-commit-notifier/git-commit-notifier
Sends HTML email commit messages splitting commits that were pushed in one step. Changes are highlighted per word.
LinkItONEDevGroup/LASS
Location Aware Sensor System by Linkit ONE
PyOCL/OpenCLGA
A Python Library for Genetic Algorithm on OpenCL
mciepluc/cocotb-coverage
Functional Coverage and Constrained Randomization Extensions for Cocotb
TL-X-org/TL-V_Projects
An overview of TL-Verilog resources and projects
WeiChungWu/vim-SystemVerilog
SystemVerilog syntax highlight/indent support in vim
keitheis/alog
Update: use loguru instead. Simple straight logging your Python code
dovebutch/tlv-comp
johnjohnlin/nicotb
A lightweight library to perform Python/Verilog co-simulation with Python3.3 coroutine + numpy. The name Nicotb cames from NatIve COroutine TestBench.
cclljj/LASS7688
trailbound/SystemVerilog1800-grammar
An ANTLR grammar for SystemVerilog-1800-2012