Pinned Repositories
aes
cache_design
cdc
Single bit toggle Clock Domain Crossing
cocotbext-vidio
AXIS video subsystem for cocotb
conv_net_hw_acceleration
A Convolution Neural Network on FPGA.
digital_video_introduction
A hands-on introduction to video technology: image, video, codec (av1, vp9, h265) and more (ffmpeg encoding).
frequency_estimation
Frequency estimation of complex signal in Noise
guitar_chord_classifier
Chord Classifier
sigmoid_tanh_verilog
Verilog Sigmoid and Tanh functions which can be configured and added to your neural network project
nitheeshkm's Repositories
nitheeshkm/sigmoid_tanh_verilog
Verilog Sigmoid and Tanh functions which can be configured and added to your neural network project
nitheeshkm/conv_net_hw_acceleration
A Convolution Neural Network on FPGA.
nitheeshkm/aes
nitheeshkm/cdc
Single bit toggle Clock Domain Crossing
nitheeshkm/cocotbext-vidio
AXIS video subsystem for cocotb
nitheeshkm/digital_video_introduction
A hands-on introduction to video technology: image, video, codec (av1, vp9, h265) and more (ffmpeg encoding).
nitheeshkm/frequency_estimation
Frequency estimation of complex signal in Noise
nitheeshkm/guitar_chord_classifier
Chord Classifier
nitheeshkm/NewtonRaphson_NLE
VHDL and Verilog code for NewtonRaphson Non Linear equation
nitheeshkm/riscv_soc
Basic RISC-V Test SoC
nitheeshkm/tensorflow_mnist
nitheeshkm/verilog-uart
Verilog UART
nitheeshkm/cocotb-test
Unit testing for cocotb
nitheeshkm/deep_learning_for_camera_trap_images
This repo contains code+pre-trained models for extracting information from camera-trap images. The pre-trained models have been trained on the Snapshot Serengeti dataset.
nitheeshkm/ethernet-physical-layer
RTL implementation of the ethernet physical layer PCS for 10GBASE-R and 40GBASE-R.
nitheeshkm/example-webui
Flask back-end, html and js
nitheeshkm/kv260_bringup
Temporary repo to gather information about the Kria KV260 board
nitheeshkm/LF-Building-a-RISC-V-CPU-Core
nitheeshkm/low-latency-ethernet
RTL implementation of the low latency ethernet modules for the NASDAQ HFT FPGA project.
nitheeshkm/Media-Transport-Library
A real-time media transport (LibOS UDP and SMPTE ST 2110) stack based on DPDK and COTS hardware.
nitheeshkm/ndk-app-minimal
Minimal Application based on Network Development Kit (NDK) for FPGA cards
nitheeshkm/nitheeshkm
nitheeshkm/ofm
Open FPGA Modules
nitheeshkm/oop-python
Object-Oriented Programming in Python
nitheeshkm/sample-python-app
Sample containerized Python Flask application for demo purposes
nitheeshkm/smpte2110-analyzer
Analyzer to inspect network packets generated by the SMPTE ST 2110 specification.
nitheeshkm/verilog-axi
Verilog AXI components for FPGA implementation
nitheeshkm/verilog-ethernet
Verilog Ethernet components for FPGA implementation
nitheeshkm/Yolo_Label
GUI for marking bounded boxes of objects in images for training neural network YOLO
nitheeshkm/yolov5
YOLOv5 🚀 in PyTorch > ONNX > CoreML > TFLite