ojeffreyo's Stars
AUTOMATIC1111/stable-diffusion-webui
Stable Diffusion web UI
lllyasviel/ControlNet
Let us control diffusion models!
nasa/fprime
F´ - A flight software and embedded systems framework
xiaoming2028/FreePAC
科学上网/翻墙梯子/自由上网/SS/SSR/V2Ray/Brook 搭建教程 免费机场、VPN工具、极光、魔法上网
UZ-SLAMLab/ORB_SLAM3
ORB-SLAM3: An Accurate Open-Source Library for Visual, Visual-Inertial and Multi-Map SLAM
Akegarasu/lora-scripts
LoRA & Dreambooth training scripts & GUI use kohya-ss's trainer, for diffusion model.
githubvpn007/v2rayNvpn
翻墙、免费翻墙、免费科学上网、免费节点、免费梯子、免费ss/ssr/v2ray/trojan节点、蓝灯、谷歌商店、翻墙梯子 、外网游戏、国外游戏、vpn、vpn推荐、每天更新、上外网、外网、V2rayN、Qv2ray、V2rayW、V2RayS、Mellow、V2rayX、V2rayU、ClashX、Kitsunebi、BifrostV、i2Ray 、Quantumult、Surge 4、winXray、Qv2ray、Kitsunebi、Trojan-Qt5、代理服务器、机场、马里奥、魔兽世界、poshMark、亚马逊、虾皮、煤炉、Mercari、外贸
PlexPt/chatgpt-java
ChatGPT Java SDK。支持 GPT-4o、 GPT4 API。开箱即用。An unofficial Java SDK for seamless integration with ChatGPT's GPT-3.5 and GPT-4 APIs. Ready-to-use, simple setup, and efficient for building AI-powered applications.
Jittor/jittor
Jittor is a high-performance deep learning framework based on JIT compiling and meta-operators.
lowRISC/opentitan
OpenTitan: Open source silicon root of trust
darklife/darkriscv
opensouce RISC-V cpu core implemented in Verilog from scratch in one night!
fishros/install
一键安装程序,欢迎大家提交代码和小鱼一起一键安装停止浪费生命
chipsalliance/riscv-dv
Random instruction generator for RISC-V processor verification
Dimsmary/OpenSTM
A Scanning Tunneling Microscope Project
westerndigitalcorporation/swerv_eh1
A directory of Western Digital’s RISC-V SweRV Cores
chipsalliance/Cores-VeeR-EH1
VeeR EH1 core
EyeTrackVR/EyeTrackVR
Open Source and Affordable, Virtual Reality Eye Tracking Platform.
antmicro/jetson-nano-baseboard
Antmicro's open hardware baseboard for the NVIDIA Jetson Nano, TX2 NX and Xavier NX
airaria/Visual-Chinese-LLaMA-Alpaca
多模态中文LLaMA&Alpaca大语言模型(VisualCLA)
chipsalliance/f4pga
FOSS Flow For FPGA
lawrie/fpga_pio
An attempt to recreate the RP2040 PIO in an FPGA
pulp-platform/riscv-dbg
RISC-V Debug Support for our PULP RISC-V Cores
chipsalliance/Cores-VeeR-EH2
lturing/ORB_SLAM3_modified
安卓手机适配orb slam3,运行mono-inertial
WCHSoftGroup/ch347
ch347 480Mbps high-speed USB to Jtag/I2C/SPI/Uart/GPIO etc.
chipsalliance/Cores-SweRV_fpga
KasuganoSoraaa/simple-AXI2AHB-bridge
AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc
NikosDelijohn/Tethorax
RISC V 32 bit Base ISA Implementation.
ojeffreyo/CloseLoopStepperMotor
Based on the open source close-loop step motor project, modified some parts by myself.
upia99/DI-star
OpenDILab Decision AI in StarCraftII