priyanshumishra7

priyanshumishra7's Stars

• jekyll/jekyll

  :globe_with_meridians: Jekyll is a blog-aware static site generator in Ruby

  Language:Ruby49.2k1.4k4.8k10k

• nasa/fprime

  F´ - A flight software and embedded systems framework

  Language:C++10.1k2621.1k1.3k

• openhwgroup/cva6

  The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux

  Language:Assembly2.3k921.1k690

• lnis-uofu/OpenFPGA

  An Open-source FPGA IP Generator

  Language:Verilog83843444162

• Xilinx/finn

  Dataflow compiler for QNN inference on FPGAs

  Language:Python74831276239

• PrincetonUniversity/openpiton

  The OpenPiton Platform

  Language:Assembly6435769216

• projf/projf-explore

  Project F brings FPGAs to life with exciting open-source designs you can build on.

  Language:SystemVerilog587393253

• SymbioticEDA/riscv-formal

  RISC-V Formal Verification Framework

  Language:Verilog585394198

• rajesh-s/computer-architecture-and-systems-resources

  A curated list of Computer Architecture and Systems resources

  46118252

• riscv/meta-riscv

  OpenEmbedded/Yocto layer for RISC-V Architecture

  Language:BitBake36637119140

• ghdl/ghdl-yosys-plugin

  VHDL synthesis (based on ghdl)

  Language:VHDL3084014531

• riscvarchive/educational-materials

  Educational materials for RISC-V

  22428250

• PrincetonUniversity/prga

  Open-source FPGA research and prototyping framework.

  Language:SCSS195152625

• xupgit/FPGA-Design-Flow-using-Vivado

  This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite

  Language:HTML9910045

• tirumalnaidu/opencl-hls-cnn-accelerator

  OpenCL HLS based CNN Accelerator on Intel DE10 Nano FPGA.

  Language:C745111

• maikmerten/spu32

  Small Processing Unit 32: A compact RV32I CPU written in Verilog

  Language:C6414213

• grg/parser-gen

  Network packet parser generator

  Language:Python509414

• projf/fpgatools

  Tools for FPGA development.

  Language:Python447211

• QuickLogic-Corp/qorc-sdk

  Open source FreeRTOS SDK for EOS S3 MCU+eFPGA SoC including gateware, software and documentation under QuickLogic Open Reconfigurable Computing (QORC) Initiative

  Language:C4493427

• defparam/PCI2Nano-RTL

  An open source FPGA PCI core & 8250-Compatible PCI UART core

  Language:Verilog39505

• mhsoftware100/FreeMODBUS-RTU-NORTOS-STM32F1

  This is an example for the FreeMODBUS library with STM32F107 Microcontroller

  Language:C30306

• defparam/PCI2Nano-PCB

  An FPGA/PCI Device Reference Platform

  Language:Verilog28503

• TI-Bonn/vercolib_pcie

  VHDL PCIe Transceiver

  Language:VHDL26817

• FISC-Project/FISC-VHDL

  FISC - Flexible Instruction Set Computer - Is the new Instruction Set Architecture inspired by ARMv8 and x86-64

  Language:VHDL14404

• thiagomiranda3/nand2tetris

  Project to build a computer from scratch with the course Nand2Tetris

  Language:Hack122

• jshaker000/SAP1

  RTL Implementation of Malvino's SAP1. I was inspired to do this after seeing Ben Eater's Breadboard implementation

  Language:C++7510

• tuhalf/SOMvhdl

  A simple and scaleable Self Organizing Map implementation written in VHDL. Tested on ARTYA7-35T board.

  Language:VHDL5201

• jakefreeman/Capstone

  Balancing Robot Senior Project

  Language:VHDL41

• rlee287/hardware-bus-infrastructure

  A collection of formal properties for hardware buses, and cores using them.

  Language:Verilog44100

• AustinFPGA/MeetingSlides

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