/fpga-lab

This is the repo for keeping track of all my FPGA learning activities.

FPGA Lab

This repo includes the designs that I am currently learning or have learned in the past.

Table of Contents

SystemVerilog/Verilog

Lab # Topic Description Status
S1 FIFO Design Everything related to FIFO design 🚧

VHDL

Lab # Topic Description Status
V1 FIFO Design Everything related to FIFO design 📌

HLS

Lab # Topic Description Status
H1 FIFO Design Everything related to FIFO design 📌

SystemVerilog/Verilog

This directory contains all SystemVerilog and Verilog labs.

VHDL

This directory contains all VHDL labs.

HLS

This directory contains all HLS labs.