sunmin123456

sunmin123456's Stars

• WangXuan95/FPGA-HDMI

  An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器

  Language:Verilog40209

• zilongxyx/ARM_Cortex-M0-on-FPGA

  【2023全国大学生FPGA 创新设计竞赛】全国二等奖作品：Cortex-M0智能飞机大战游戏机 开源项目

  Language:Verilog1910

• warren-wzw/Algorithm-deployment-template-of-each-platform

  边缘设备端算法部署模板框架（包括海思SS928、Hi3519 DV500；瑞芯微rv1126、rk588、比特大陆BM1684X）,部署项目包括yolov5、picodet、MNIST，包括优化加速教程

  Language:C++18107

• wyh-neophyte/Masked-AutoEncoder-Pretraining-for-Mechanical-Fault-Diagnosis

  This repo is Pytorch implementation of Masked AutoEncoder Pretraining (MAE) for Mechanical Fault Diagnosis.

  Language:Python6211

• alirezaamir/HDL-SpikingNet-ECG

  An FPGA Implementation for ECG Classification Inference with Spiking Neural Network

  Language:Verilog410

• dasjaydeep2001/Efficient-On-Chip-Seizure-Detection-System-Using-SVM-Based-VLSI-Design

  This on-chip system, designed for high efficiency and accuracy, is based on Very Large Scale Integration (VLSI) and employs a nonlinear Support Vector Machine (SVM). It comprises a feature extraction (FE) module that extracts relevant features from electroencephalogram (EEG) signals and an SVM module that efficiently learns and classifies seizures.

  Language:Verilog410

• adarshv96/GCN-WESAD-SWELL

  Codes for the paper "MENTAL STRESS DETECTION FROM ULTRA-SHORT HEART RATE VARIABILITY USING EXPLAINABLE GRAPH CONVOLUTIONAL NETWORK WITH NETWORK PRUNING AND QUANTISATION"

  Language:Python3110

• alexsalman/Heart-Rate-Variability

  2024 - Heart Rate Variability Processing with Artificial Intelligence Techniques.

  Language:Python3300

• Lucamiras/sleep-apnea

  Potential portfolio project for my time at DSR Berlin. Detecting sleep apnea from smartphone microphone recordings of sleep sounds.

  Language:Jupyter Notebook3100

• nitinvetcha/Fault_Detection_and_Diagnosis_in_cyber_physical_systems_using_a_hybrid_deep_learning_approach

  This repository contains the .ipynb files for implementing a hybrid deep learning model aimed at performing fault detection and diagnosis in cyber-physical systems

  Language:Jupyter Notebook310

• WYJBIT/ECGSleepNet

  A rnn-cnn based network for sleep stage classification using ECG signals.

  Language:Python3201

• BME-AI-Lab/MVCNN_SREM

  Code for Research Article Deciphering the Optimal Radar Ensemble for Advancing Sleep Posture Prediction through a Multiview Convolutional Neural Network (MVCNN) Using Spatial Radio Echo Map (SREM)

  Language:Python2200

• dafei2017/Multi_modal-decision-fusion-neural-network-for-emotion-recognition-using-face-EEG

  The frequency spectrum features were extracted from EEG by the power spectral density(PSD), and then the features were classified into emotions by Gated Recurrent Unit(GRU) with attention mechanism. The sequential characteristic of CV and the sequential information of EEG signal are fused for multi-mode decision making.

  Language:Python2210

• fravigan/fpga-comunication-system

  Tesi triennale in Fisica: "Sistema di comunicazione ottico basato su FPGA per l’esperimento CUPID"

  Language:VHDL210

• miralab-ai/Phase-OTDR-event-detection

  2100

• MrTVjize/PUF_GO

  PUF GO:基于物理不可克隆函数的集成可信安全系统 随着信息技术的快速发展和互联网的普及，用户和企业对于数据安全、隐私保护和系统可靠性的关注越来越高。物理不可克隆函数(PUF)作为一类新型硬件密码原语，具有免密钥、轻量级、防篡改等特点，能够作为可信执行环境的硬件安全基础。本项目在FPGA芯片上实现PUF电路，将PUF电路与LoongArch架构微处理器结合，通过PUF提供硬件可信根，从而在龙芯开发板上实现可信执行环境，完成对内核关键数据、指定程序的可信度量和验证，实现基于PUF实现的的可信安全系统。

  Language:Verilog210

• plops/K325T_SFP_PCIE_2021

  Try to make sense of example FPGA Code for a PCIe card from Aliexpress

  Language:Verilog210

• Wissance/QuickRS232

  A versatile full-duplex RS232 FPGA module with internal FIFO buffer on RX

  Language:Verilog2311

• Abhijeet07Singh/ECG-Monitoring

  Language:Verilog110

• ahnafshahrear/Signal-Processing-EEG

  Academic Lab Course of the 27th batch of Computer Science & Engineering | University of Rajshahi - 🇧🇩

  Language:Verilog110

• Anxious-owl/ECG_Spark_project

  Summer Internship Project @ IIT Roorkee 2024

  Language:Verilog110

• Codemosaw/PhiOTDRSim

  Simulador de un sensor acustico distribuido basado en fibra óptica haciendo uso de la tecnica de reflectometria óptica en el dominio temporal

  Language:MATLAB110

• ibrahim-mostafaa/Hardware-Acceleration-of-EEG-Signals-Compression

  Language:Verilog110

• Ishan2510/Efficient-Data-Transmission-via-UART-on-FPGA

  Language:Verilog1100

• MohMsh/CVDs_HRV

  Prediction of Cardiovascular Diseases with Heart Rate Variability Data and Machine Learning

  Language:Python110

• PHANTOM-2004/MIPS-MULTI-CYCLE-CPU

  多周期CPU(MIPS指令集), 支持其中54条指令. (From 同济大学计算机组成原理课程设计)

  Language:Verilog110

• phuoc0402/Residual-Channel-Attention-Networks-based-on-FPGA

  IMPLEMENTATION OF IMAGE SUPER RESOLUTION NETWORK BASED ON THE XILINX ZYNQ ULTRASCALE+ MPSOC - ZCU102 EVALUATION KIT

  Language:Python130

• saidurga4521/Fault-detection-and-Diagnostics-using-ML

  Language:Jupyter Notebook110

• Tirthhalvadia/Matrix-Multiplication-with-FPGA-based-Systolic-Array-Architecture

  Language:SystemVerilog1100

• zengfanbin123/canny_edge_detection_FPGA

  Language:Verilog110