digitaldesign
There are 32 repositories under digitaldesign topic.
ahmed-agiza/EDAViewer
EDAV: Open-Source EDA Viewer; render design LEF/DEF files in your browser!
siorpaes/SimpleSoC
Very simple Cortex-M1 SoC design based on ARM DesignStart
tharunchitipolu/RISC-V-32I-based-core-with-Advanced-Extensible-Interface
5 stage pipelined RISC-V core with AXI3 bus protocol between the directly mapped cache and main memory.
ahegazy/HDL
This repository contains scripts that I create through my digital design course in Verilog, VHDL, SystemVerilog etc..
Mohamedsalem80/VHDL-tutorial
VHDL tutorial
Vishakha7501/Sky-130-RTL-Design-and-Synthesis-Workshop-using-Verilog
RTL Design and Synthesis Workshop using Verilog with Sky130 Technology
GabbedT/FIFO
FIFO buffer library. Written and verified in SystemVerilog. Can be synthetised in ASIC or FPGA.
Abdelrahman-Adel610/Full_AES-Verilog
Full AES (Verilog)
GabbedT/Arithmetic-Circuits
This repository contains different modules which execute arithmetic operations.
abxhr/University
A repo to store the coursework I do in college! 🎓
Pirate-Emperor/CipherX
CipherX is a verification project for Advanced Encryption Standard (AES-128) using Universal Verification Methodology (UVM). It leverages Verilog, SystemVerilog, and Python to ensure robust encryption algorithm validation, integrating comprehensive UVM components and tests.
Irash-Perera/Computer-Organization-and-Digital-Design-Projects
Computer Organization and Digital Design Projects - CS1050 - Semester 2
mshetty149/Hardware-Designs
RTL Designs along with testbenches to verify them written in Verilog. Icarus Verilog an open source simulator was used for simulations.
mshetty149/Placer-and-router-software-for-VLSI
Placer and Router for standard cells
yezzfusl/FlexComSwitch
VHDL controller for dynamic protocol switching (CAN, LIN, FlexRay).
0xmuhammed9/Collage-4th-FirstTerm
Senior Year - First Term - Faculty of Engineering Helwan University - Repository
ahagmann/dtc
Digital Design Timing Constraints
AntEncarnacion/digital-systems-playground
Educational repo for storing my practice sessions with digital systems as well as solutions to online courses or university courses I take. These implementations are done in VHDL or Verilog.
darter-funny/fidget-spinner-republic
For all the fidget spinneteers out there
Escaper2/DigitalDesign-Engineer-School
Школа инженера от DigitalDesign
Myriam2002/Digital_lock_for_a_safe
Basic digital lock system for safes, employing logic gates 🔐
rhit-bryantlj/Verilog-Pong-Game
Repository containing the code for implementing the classic game Pong on a Nexys A7 Digilent FPGA development board.
serhaturtis/DD-LTC2311-16
IP Module For LTC2311 ADC
VladMarianCimpeanu/digital-design-project-
images equalizer in VHDL
z4chh/FPGA_Slot_Machine
A slot machine created in System Verilog. It was built, simulated, synthesized, and implemented in Vivado, for use on the Xilinx Basys 3 board.
AnuragSChatterjee/NUS-EE2026-Digital-Design
Took a module on Digital Design Fundamentals during my year 2 of my undergraduate studies of Electronic Circuits done using VHDL and Verilog, with a final project on FPGA Programmed Flappy Bird Gaming System using Sound and Light effects.
Arna-Maity/Verilog_Modules
This repository contains a few useful Verilog modules
EswarAdithya011/Mealy-Sequence-Detector-CMOS-90nm
This repository contains the design and implementation of a 4-bit Mealy Machine-based Overlapping Sequence Detector for detecting the sequence "1001" using 90nm CMOS technology and simulated in Cadence Virtuoso. The design employs SISO registers and master-negative edge-triggered D flip-flops within a Mealy machine architecture.
jacobhuesman/digital_design
Miscellaneous stuff from the NDSU Digital Design Class
marconip/magazines-presentation-interface
a quick interface to any digital device that features magazines as a product
sidhantp1906/4-bit-first-divider
4 bit divider design using first divider algorithm
sidhantp1906/PulseWidthModulation
PWM module using verilig HDL in XILINX ISE