system-on-chip
There are 83 repositories under system-on-chip topic.
enjoy-digital/litex
Build your hardware, easily!
stnolting/neorv32
🖥️ A small, customizable and extensible MCU-class 32-bit RISC-V soft-core CPU and microcontroller-like SoC written in platform-independent VHDL.
The-OpenROAD-Project/OpenLane
OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.
sld-columbia/esp
Embedded Scalable Platforms: Heterogeneous SoC architecture and IP integration made easy
kactus2/kactus2dev
Kactus2 is a graphical EDA tool based on the IP-XACT standard.
stnolting/neo430
:computer: A damn small msp430-compatible customizable soft-core microcontroller-like processor system written in platform-independent VHDL.
rafaelcalcada/rvx
RISC-V microcontroller IP core developed in Verilog
TinyRetroWarehouse/Awesome-Retro-Docs
A curated collection of technical documentation for Arcades, Handhelds, Consoles, Computers and MCU’s.
ultraembedded/riscv_soc
Basic RISC-V Test SoC
arm-university/Introduction-to-SoC-Design-Education-Kit
Gain an introductory knowledge to the basics of SoC design and key skills required to implement a simple SoC on an FPGA, and write embedded programs targeted at the microprocessor to control the peripherals
azonenberg/antikernel
The Antikernel operating system project
meiniKi/FazyRV
A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.
amaranth-lang/amaranth-soc
System on Chip toolkit for Amaranth HDL
PrincetonUniversity/ILAng
A Modeling and Verification Platform for SoCs using ILAs
sy2002/QNICE-FPGA
QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.
sparkfun/ESP32_Thing
Development platform for the Espressif ESP32 WiFi/Microcontroller SoC
maikmerten/spu32
Small Processing Unit 32: A compact RV32I CPU written in Verilog
manili/VSDBabySoC
VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.
ZipCPU/zbasic
A bare bones, basic, ZipCPU system designed for both testing and quick integration into new systems
saursin/riscv-atom
An open-source 32-bit RISC-V soft-core processor
HEP-SoC/SoCMake
CMake based hardware build system
mpskex/chisel-npu
Chisel implementation of Neural Processing Unit for System on the Chip
sergachev/litex-template
Template project for LiteX-based SoCs
Hank0626/FPGA-Game-Design
Fireboy & Water Girl in the Forest Temple implemented on an FPGA board for UIUC's ECE385 Digital Systems Laboratory.
ZipCPU/videozip
A ZipCPU SoC for the Nexys Video board supporting video functionality
EpiSci/SoCRATES
System-on-Chip Resource Adaptive Scheduling using Deep Reinforcement Learning
machdyne/zucker
Zucker SOC
BigEd/XSOC-xr16
System-on-a-Chip for FPGA, with xr16 RISC core and LCC port
ept221/pet-on-a-chip
Senior Design
cezs/jtx1inst
A custom C API for instrumenting Jetson TX1’s SoM and SoC
hajali-amine/stm32-workshop
Our work during the STM32 workshop that we studied at INSAT.
infini8-13/riscv-ms-soc
A RISC-V Mixed Signal System-on-Chip(SoC) produced by integrating RVMyth RISC-V Core with Phase Locked Loop(PLL) as a clock multiplier
OValery16/TransferCL
TransferCL: an open framework for transfer learning on mobile device
plasoc/axiplasma
AXI/MIPS SoC developed in VHDL with FreeRTOS port. Capable of running either preemptively or cooperatively.
SnrNotHere16/HDMIBreakout
A ZYNQ 7020 project that plays breakout via HDMI.
Fleker/chipyard-viewer
An online viewer for Chipyard output files