systemrdl-compiler

There are 10 repositories under systemrdl-compiler topic.

SystemRDL/systemrdl-compiler
SystemRDL 2.0 language compiler front-end
Language:Python226 27 15463
Juniper/open-register-design-tool
Tool to generate register RTL, models, and docs using SystemRDL or JSpec input
Language:Verilog191 44 8568
SystemRDL/PeakRDL
Control and status register code generator toolchain
Language:Python88 12 3522
SystemRDL/PeakRDL-regblock
Generate SystemVerilog RTL that implements a register block from compiled SystemRDL input.
Language:Python48 15 10039
SystemRDL/PeakRDL-html
Generate address space documentation HTML from compiled SystemRDL input
Language:JavaScript46 12 4414
SystemRDL/PeakRDL-ipxact
Import and export IP-XACT XML register models
Language:Python32 9 1811
sdnellen/open-register-design-tool
Tool to generate register RTL, models, and docs using SystemRDL or JSpec input
Language:Verilog15 5 223
Risto97/PeakRDL-halcpp
C++ 17 Hardware abstraction layer generator from systemrdl
Language:C++7 2 05
Silicon1602/srdl2sv
A SystemRDL 2.0 to (synthesizable) SystemVerilog compiler.
Language:Python6 2 132
andjeraj/DEDA_Class_2017
This repository is for DEDA class in 2017.
Language:Python1 1 00