vivado
There are 515 repositories under vivado topic.
LeiWang1999/FPGA
帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目
fastmachinelearning/hls4ml
Machine learning on FPGAs using HLS
hdl-util/hdmi
Send video/audio over HDMI on an FPGA
eugene-tarassov/vivado-risc-v
Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
f4pga/prjxray
Documenting the Xilinx 7-series bit-stream format.
olofk/edalize
An abstraction library for interfacing EDA tools
jofrfu/tinyTPU
Implementation of a Tensor Processing Unit for embedded systems and the IoT.
pavel-demin/red-pitaya-notes
Notes on the Red Pitaya Open Source Instrument
changwoolee/lenet5_hls
FPGA Accelerator for CNN using Vivado HLS
mshr-h/vscode-verilog-hdl-support
HDL support for VS Code
Xilinx/RapidWright
Build Customized FPGA Implementations for Vivado
tymonx/logic
CMake, SystemVerilog and SystemC utilities for creating, building and testing RTL projects for FPGAs and ASICs.
ichi4096/vivado-on-silicon-mac
Installs Vivado on M1/M2 macs
Gowtham1729/Image-Processing
Image Processing Toolbox in Verilog using Basys3 FPGA
hpcn-uam/Limago
Limago: an FPGA-based Open-source 100 GbE TCP/IP Stack
Starrynightzyq/Nexys4DDR-ARM-M3-Plate-Recognition
车牌识别,FPGA,2019全国大学生集成电路创新创业大赛
UCLA-VAST/RapidStream
[FPGA 2022, Best Paper Award] Parallel placement and routing of Vivado HLS dataflow designs.
nxbyte/ARM-LEGv8
Verilog Implementation of an ARM LEGv8 CPU
ilaydayaman/CNN_for_SLR
A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.
tomas-fryza/vhdl-course
VHDL course at Brno University of Technology
PyFPGA/pyfpga
A Python package to use FPGA development tools programmatically.
WangXuan95/Zynq-Tutorial
使用 Vivado+PetaLinux 为 Xilinx Zynq7 搭建 Linux 系统 —— 以 Zedboard 为例
hdl-modules/hdl-modules
A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
lauchinyuan/FPGA_QPSK-modem
A QPSK modem written in the Verilog hardware description language, that can be implemented on FPGA
hukenovs/intfftk
Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source language - VHDL / Verilog). GNU GPL 3.0.
KeitetsuWorks/EBAZ4205
Vivado and PetaLinux projects for Zynq EBAZ4205 Board
f4pga/prjuray
Documenting the Xilinx Ultrascale, Ultrascale+ and UltraScale MPSoC series bit-stream format.
HWAC-DL/hwac_object_tracker
FPGA accelerated TinyYOLO v2 object detection neural network
suoglu/Fixed-Floating-Point-Adder-Multiplier
16-bit Adder Multiplier hardware on Digilent Basys 3
OVGN/OpenHBMC
Open-source high performance AXI4-based HyperRAM memory controller
li3tuo4/rc-fpga-zcu
Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)
diogofferreira/fpga-miner
:moneybag: A simplified version of an FPGA bitcoin miner :moneybag:
tymonx/virtio
Virtio implementation in SystemVerilog
25th-engineer/HFUT_2020_MIPS_CPU
合肥工业大学2020年《系统硬件综合设计》（《计算机组成原理》课程设计，CPU）的代码与报告；使用Verilog实现全冒险处理机制的MIPS五段流水CPU，支持MIPS-C3的50条指令。
FDUCSLG/ICS-2021Spring-FDU
Introduction to Computer Systems (II), Spring 2021
MJoergen/HyperRAM
Portable HyperRAM controller