upscale-project/sqed-generator

Issues

• QuestaSim does not allow continuous assignment to a reg found in `modify_instruction.v`

  #5 opened 3 years ago
  2

• QuestaSim vlog Compiler does not allow `assume` in Verilog files

  #4 opened 3 years ago
  1

• Add QED license files and headers

  #3 opened 3 years ago
  0

• Suggested bug fix: spurious counterexamples in ridecore demo

  #2 opened 5 years ago
  0

• Comments on current version

  #1 opened 5 years ago
  0