wotupfoo's Stars
xobs/novena-ws2812b-fpga
WS2312B driver for Novena FPGA
keylase/nvidia-patch
This patch removes restriction on maximum number of simultaneous NVENC video encoding sessions imposed by Nvidia to consumer-grade GPUs.
pdbear/syno_nvidia_gpu_driver
Nvidia Driver for Synology DiskStation
Jnesselr/fusion-360-total-exporter
Need to export all of your fusion data in a bunch of formats? We've got you covered
raspberrypi/debugprobe
raspberrypi/pico-examples
rggen/rggen-docker
Docker image for RgGen
rggen/rggen
Code generation tool for control and status registers
jessfraz/dockerfiles
Various Dockerfiles I use on the desktop and on servers.
aws-samples/awsome-distributed-training
Collection of best practices, reference architectures, model training examples and utilities to train large models on AWS.
NVIDIA/nccl-tests
NCCL Tests
mcmayer/iCE40
Lattice iCE40 FPGA experiments - Work in progress
TheR1D/shell_gpt
A command-line productivity tool powered by AI large language models like GPT-4, will help you accomplish your tasks faster and more efficiently.
adam-maj/tiny-gpu
A minimal GPU design in Verilog to learn how GPUs work from the ground up
WebBluetoothCG/web-bluetooth
Bluetooth support for the Web.
FPGAwars/FPGA-peripherals
:seedling: :snowflake: Collection of open-source peripherals in Verilog
FPGAwars/apio-examples
:seedling: Apio examples
icebreaker-fpga/icebreaker
Small and low cost FPGA educational and development board
SpinalHDL/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
smunaut/iCE40linux
Gateware / Firmware / BuildRoot to run linux on iCE40 / iCEBreaker
smunaut/ice40-playground
Various iCE40 cores / projects to play around with (mostly targeted at the icebreaker)
alexforencich/ftjrev
JTAG reverse engineering software for FTDI compatible cables
alexforencich/verilog-axi
Verilog AXI components for FPGA implementation
alexforencich/verilog-wishbone
Verilog wishbone components
alexforencich/verilog-axis
Verilog AXI stream components for FPGA implementation
alexforencich/verilog-pcie
Verilog PCI express components
alexforencich/verilog-ethernet
Verilog Ethernet components for FPGA implementation
HDLForBeginners/Examples
alexforencich/verilog-i2c
Verilog I2C interface for FPGA implementation
jagenjo/litegraph.js
A graph node engine and editor written in Javascript similar to PD or UDK Blueprints, comes with its own editor in HTML5 Canvas2D. The engine can run client side or server side using Node. It allows to export graphs as JSONs to be included in applications independently.