wuch10

Pinned Repositories

verilog-format
Verilog formatter
Language:Java176 4 3132
vscode-terosHDL
VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
Language:VHDL562 23 46045
HLx_Examples
Open Source HLx Examples
Language:MATLAB00
Open-IC-DEV
Open IC DEV 是一个基于 iVerilog, SystemC, UVM, verible, verilator, oh-my-zsh，vscode 等开源工具链的开发环境。
Language:Shell00
vscode-plugin-LazyKey
【懒键】[VSCode 插件] 分析上下文内容，通过各种自动化宏使得按键次数大大减小，而不影响原来的操作习惯
Language:JavaScript00

wuch10's Repositories

wuch10/HLx_Examples
Open Source HLx Examples
Language:MATLAB00
wuch10/Open-IC-DEV
Open IC DEV 是一个基于 iVerilog, SystemC, UVM, verible, verilator, oh-my-zsh，vscode 等开源工具链的开发环境。
Language:Shell00
wuch10/vscode-plugin-LazyKey
【懒键】[VSCode 插件] 分析上下文内容，通过各种自动化宏使得按键次数大大减小，而不影响原来的操作习惯
Language:JavaScript00