Pinned Repositories
Advanced-Embedded-System-Design-Flow-on-Zynq
awslabs
Basys3
XUP Basys3 Boards' LIBs and Projects
compute_acceleration
Embedded-System-Design-Flow-on-Zynq
Updated version of the XUP Workshops
FPGA-Design-Flow-using-Vivado
This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite
High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems using Vivado HLS. Now under 2018.2 version.
System-Design-on-Zynq-using-SDSoC
VHDL
Open Hardware 2015: TU Crete; Game of Life
Zynq-Design-using-Vivado
This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
xupgit's Repositories
xupgit/FPGA-Design-Flow-using-Vivado
This course gives an introduction to digital design tool flow in Xilinx programmable devices using Vivado® Design software suite
xupgit/Zynq-Design-using-Vivado
This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
xupgit/High-Level-Synthesis-Flow-on-Zynq-using-Vivado-HLS
This course provides professors with an understanding of high-level synthesis design methodologies necessary to develop digital systems using Vivado HLS. Now under 2018.2 version.
xupgit/Advanced-Embedded-System-Design-Flow-on-Zynq
xupgit/awslabs
xupgit/Basys3
XUP Basys3 Boards' LIBs and Projects
xupgit/compute_acceleration
xupgit/Embedded-System-Design-Flow-on-Zynq
Updated version of the XUP Workshops
xupgit/System-Design-on-Zynq-using-SDSoC
xupgit/VHDL
Open Hardware 2015: TU Crete; Game of Life
xupgit/AWS-F1-Developer-Labs
xupgit/ZedBoard-Final-System-Design
Open Hardware 2015: RUB; Complete System Design with both IP core implemented
xupgit/finance.americanoption.zynq.hls
Open Hardware 2015: TU Kaiserslautern; American Option Pricing on Zynq
xupgit/finance.zynqpricer.hls
Open Hardware 2015: TU Kaiserslautern; Heston implementation for Zynq with Vivado HLS
xupgit/rt2018