Pinned Repositories
firrtl
Flexible Intermediate Representation for RTL
rocket-chip
Rocket Chip Generator
riscv-tools
RISC-V Tools (ISA Simulator and Tests)
riscv-opcodes
RISC-V Opcodes
berkeley-hardfloat
chisel2-deprecated
fpga-zynq
Support for Rocket Chip on Zynq FPGAs
riscv-sodor
educational microarchitectures for risc-v isa
riscv-torture
RISC-V Torture Test
verilog-pinlist
extract pinlist from verilog files
yunsup's Repositories
yunsup/verilog-pinlist
extract pinlist from verilog files