Panos26

Panos26's Stars

• NVlabs/sionna

  Sionna: An Open-Source Library for Next-Generation Physical Layer Research

  Language:Python84341257246

• KastnerRG/pp4fpgas

  Parallel Programming for FPGAs -- An open-source high-level synthesis book

  Language:TeX8015618149

• TerosTechnology/vscode-terosHDL

  VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

  Language:VHDL5792447847

• aff3ct/aff3ct

  Fast multi-thread FEC simulator & library of efficient digital communication algorithms for SDR.

  Language:C++47936158148

• lowRISC/style-guides

  lowRISC Style Guides

  3817134123

• mupq/pqm4

  Post-quantum crypto library for the ARM Cortex-M4

  Language:C3041617177

• tavildar/Polar

  C and MATLAB implementation for Polar encoding and decoding

  Language:Matlab12211676

• robmaunder/polar-3gpp-matlab

  Matlab simulations of the encoder and SCL decoder for the New Radio polar code from 3GPP Release 15

  Language:MATLAB12116577

• cihatkececi/ChannelCodingProjectList

  List of open source channel coding projects and libraries.

  11312137

• emanuelfreitas/3gpp-documentation

  3GPP Documentation

  Language:Python716023

• YuYongRun/PolarCodes-Encoding-Decoding-Construction

  Polar codes Fast MATLAB implementations, including encoder, several types of SC decoder, CRC-SCL decoder and many code construction algorithms.

  Language:MATLAB604118

• mcba1n/polar-codes

  A library for polar codes in Python.

  Language:Python534215

• Spartak0s/Polar-Codes-Software-Matlab-

  Polar Codes on Matlab Simulation.

  Language:MATLAB506028

• Architech-Silica/Designing-a-Custom-AXI-Slave-Peripheral

  A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools

  Language:VHDL409218

• IAIK/ascon_hardware

  Hardware implementations of the authenticated encryption design ASCON

  Language:VHDL192007

• just1nGH/Polar-Code-CPP

  Polar Code C++ Implementation

  Language:C++18307

• aff3ct/polar_decoder_gen

  This project is made to generate Polar decoders (unrolled decoders).

  Language:C++12512

• Spartak0s/Polar-Codes-Hardware-VHDL

  Polar Codes Implementation on Vhdl

  Language:VHDL12317

• bigdot123456/5GPolar

  Polar encoding & decoding

  Language:MATLAB11409

• sravan-ankireddy/polar_codes

  Construction, encoding and decoding of Polar Codes. List decoding of Polar Codes.

  Language:C9105

• Vor-Art/DCD_MultiBankMemory

  SystemVerilog implementation of a multi-bank memory as part of "[F23] Digital Circuit Design" course

  Language:SystemVerilog7101

• chclau/axi_lite_reg-

  Registers bank with Axi-Lite interface

  Language:VHDL4100

• CristianG89/Design_Digital_Systems_1

  Partly implementation of cryptographic algorithm RSA in VHDL, and validated with Python

  Language:VHDL31

• ece8264/DSP_LABS

  A series of interesting lab projects focusing on constructing digital filters for real time processing , utilizing Texas instrument DSK6713 board. These are: 1) Introductory exercise 2)Design and construction of digital IIR filter 3)Construction of DTMF decoder 4)Adaptive filter application 5)

  Language:C30

• IAIK/Picnic-FPGA

  FPGA implementation of Picnic and LowMC

  Language:VHDL31000

• mmattioli/rc5

  RC5-32/12/16 hardware implementation

  Language:VHDL3102

• ece8264/Digital_IC-s_Simulations

  Spice simulations of basic Digital IC's configuration

  Language:AGS Script2000

• PiJoules/ECEC-302-Assignments

  Code written for Digital Systems

  Language:VHDL21

• antwon87/RC5_FPGA_Processor_Project

  This is a project I did for class in Fall 2017. The project involved writing VHDL code to emulate a single-stage, MIPS-like processor on the Nexys4DDR FPGA board. I then wrote assembly code for the processor to implement the RC5 cryptographic algorithm. Video demonstration of the project running on the FPGA can be found at https://youtu.be/zVQs-y0smLg.

  Language:VHDL11

• madellimac/viterbi

  Language:VHDL11