GateMate Yosys in the CologneChip tool package is outdated

[chili-chips-ba]

See: #3 (comment)

As a bare minimum, CologneChip should have at least a 6-month Yosys update cadence, i.e. at least two times a year.
Proper SystemVerilog support should also come built-in, be it via Synlig plugin, or by using SV2V preprocessing.

[chili-chips-ba]

@pu-cc could you please help us understand CologneChip strategy on this question. Then, as you see fit, close this issue.

When it comes to SV support, we have already settled on SV2V pre-processor, which makes the question of Synlig compatibility irrelevant at this point, esp, given that Synlig itself is not at the peek of its maintenance.