/EE175

EE 175 Senior Design. Multibaseline Stereo Camera

Primary LanguageCMIT LicenseMIT

Hardware

Camera Module: OV7670 w/ 16 pins FPGA board: Z-turn Board by MYIR with ARM Processor and Zynq7020 Additionally used the I/O cape extension FPGA Board: Neso Artix-7 Camera Module: OV2640 Compute Platform: nVidia Jetson TX2

Software

Xilinx Vivado Matlab Python OpenCV