selimsandal's Stars
LadybirdBrowser/ladybird
Truly independent web browser
KindXiaoming/pykan
Kolmogorov Arnold Networks
SanderMertens/flecs
A fast entity component system (ECS) for C & C++
FlaxEngine/FlaxEngine
Flax Engine – multi-platform 3D game engine
olofk/serv
SERV - The SErial RISC-V CPU
google/xls
XLS: Accelerated HW Synthesis
analysis-tools-dev/dynamic-analysis
⚙️ A curated list of dynamic analysis tools and linters for all programming languages, binaries, and more.
Pjbomb2/TrueTrace-Unity-Pathtracer
A High Performance Compute Shader Based Mesh Pathtracer in Unity3d without RT Cores
michaeljclark/rv8
RISC-V simulator for x86-64
redorav/public_source_engines
Game Engines with Source: Learning from the best
GaloisInc/reopt
A tool for analyzing x86-64 binaries.
pulp-platform/mempool
A 256-RISC-V-core system with low-latency access into shared L1 memory.
saagarjha/TSOEnabler
Kernel extension that enables TSO for Apple silicon processes
IntelLabs/riscv-vector
Vector Acceleration IP core for RISC-V*
him4318/Transformer-ocr
Handwritten text recognition using transformers.
toddmaustin/bringup-bench
Bringup-Bench is a collection of standalone minimal library and system dependence benchmarks useful for bringing up newly designed CPUs, accelerators, compilers and operating systems. You probably don't need Bringup-Bench, but if you do, you probably need it badly!
jheruty/hscpp
Runtime compiled C++ with hot-swapped classes.
nbdd0121/r2vm
Rust RISC-V Virtual Machine
turkish-nlp-suite/turkish-spacy-models
Repo for spaCy Turkish model development.
srokicki/HybridDBT
Colton1skees/TritonTranslator
Standalone static version of Triton's x86/x64 translator
oxtra/oxtra
oxtra is a lightweight and easy to use binary translator capable of executing x86-64 programs on RISC-V.
RISMicroDevices/CHIron
Open-source AMBA CHI infrastructures (supporting Issue B, E.b)
hjking/mydotfiles
my rc files
aaronshappell/tage-predictor
SystemVerilog implemention of the TAGE branch predictor
ispras/RISC-V-nML
RISC-V nML is a specification of ISA RISC-V in nML architecture decription language.
ArturKlauser/gem5-dev
gem5 ARM development environment docker image
rajivbishwokarma/rsig
TCL script to run the whole process from project creation to bitstream writing to FPGA device in Xilinx Vivado.
xlsynth/dslx-vscode
XLS DSLX Language Support for Visual Studio Code
rahulrs/auto_processes
An online backup of my beloved automated processes scripts