📝About:
- Verilog structural model HDL program for a 8-bit hybrid adder circuit
💻To run:
- Install iVerilog.
- Run the generated vvp file using the command:
vvp grif2.vvp
- Run the waveform file using the command:
gtkwave grif2. vcd
📝About:
💻To run:
vvp grif2.vvp
gtkwave grif2. vcd