agalimberti/NoCRouter
RTL Network-on-Chip Router Design in SystemVerilog by Andrea Galimberti, Filippo Testa and Alberto Zeni
SystemVerilogMIT
Stargazers
- 1freitas@warrenbrasil
- aditya1github
- albertozeniPolitecnico di Milano
- byron-zjl
- daehkimGeorgia Institute of Technology
- DDDKan
- dianjituodong
- dkasxx
- dreamflyings
- emilianogagliardi@EmilianoGagliardiEmanueleGhelfi
- EngRaff92Qualcomm
- f-testa
- Furqan-VLSI
- greatshuyi
- himingway
- iDoka@dokard @deepware-ai
- ishitmakwanaIntel Corporation
- jasonzzzzzzzToronto, Canada
- jomonkjoy
- lidapangCadence
- mballanceAMD
- nahin100Rajshahi, Bangladesh
- NickolayTernovoySemidynamics
- nshar-54
- outputlogicOutputLogic.com
- OYounis
- pizhuzhu
- qshanShanghai, China
- roger452
- taichi-ishitani@pezy-computing
- tangent999
- thbuehler
- timewhshanghai
- VoidedMuse
- xiaoqiang199x
- YangWang92