/RV32I_Single_Cycle

This repository contains an implementation of a RV32I fetch pipeline microprocessor. The RV32I is a 32-bit RISC-V instruction set architecture, with the 'I' extension indicating the base integer instructions.

Primary LanguageVerilog

RV32I Single Cycle and Fetch Pipeline Processor Implementations

This repository contains implementations of processors based on the RV32I instruction set architecture using Verilog HDL: a single-cycle processor and a fetch pipeline processor.