Salaga family of RISC-V hardware and some GUI software to run on it!
The purpose of this project is to improve my systems knowledge by implementing what I learnt in USC's EE356, EE457, and EE402 courses by Prof. Marco Paolieri, Prof. Gandhi Puvvada, and Prof. Bill Cheng respectivly.
I want to setup a hardware-software stack where I can run a bare-metal-C GUI program on the hardware I wrote!
Thanks to Bruno Levy's learn-fpga repository. It has been a huge help! It has most of the thing one needs to learn not just about logic-design for FPGAs, but writing bare-metal software as well.
I use Ubuntu, and the following instructions should be similar for other UNIX-like systems.
For now, simulation is done using iverilog
. However, I soon plan on adding support for verilator
to speed up simulation time.
1) Installing iverilog
sudo apt install iverilog
2) Install RISC-V GNU Toolchain (Not required if you plan on just running code under the tests directory)
Follow instructions given at RISC-V GNU Toolchain GitHub repository. You will need the riscv64-unknown-elf-*
binaries to be installed to compile software for Salaga-RV.
Clone the repository
git clone https://github.com/ndyashas/Salaga-RV.git
cd Salaga-RV
Examples are split into two categories.
Go into the examples directory
cd examples
cd no-gui
Code under gui are examples where the processor supports display functions such as setting color to a pixel, or drawing a rectangle!. Although the drivers are not very realistic, I felt the way it is implemented now is a good stage before I jump into a more realistic driver implementation.
Eg: To run the simple display-testing program, run the 001_display_test example as follows
cd 001_display_test
make Jala
The above command will compile the simulation model, and generate an executable. To run the simulation,
./obj_dir/Vtb
cd no-gui
Code under no-gui are examples where one can use functions such as putchar
! (I'm yet to add support printf
). The putchar
function uses a memory-mapped UART port. The UART output is captured in the simulation and printed onto the console. This procedure is neatly explained in Bruno Levy's project here. Although the pinned_array
is not required here, I have kept it nevertheless.
The procedure to run the examples are the same as in no-io
Eg: Let us simulate running the print_zig_zag example on the Jala core.
cd 002_print_zig_zag
make Jala
This should print out soomething as follows on your terminal
*
*
*
*
*
*
*
*
*
*
*
*
*
The program completed in 41108 cycles
Go into the tests directory
cd tests
You can run all the tests at once on a given core by executing the run_unit_tests.sh script passing one of the processor cores as arguments.
Eg: To run all test cases against the Eka core, run the following command. You can test against the Jala core as well.
./run_unit_tests.sh Eka
*NOTE that
Eka
is passed as an argument to therun_unit tests.sh
script to run the test against the Eka core.
If a test fails, you may go into the directory of that specific test and run it.
Eg: If a test such as the tests/010_test_sw-junior_lw-senior2 fails for Jala, you can do the following to see why it failed
cd 010_test_sw-junior_lw-senior2
./run_test.sh Jala
*NOTE that
Jala
is passed as an argument to therun_test.sh
script to run the test against the Jala core.