riscv-non-isa/server-soc

Issues

• ARC Feedback

  #48 opened 5 months ago by ved-rivos
  8

• Server SoC spec applicable to a VM environment?

  #45 opened 6 months ago by andreiw
  7

• Watchdog?

  #47 opened 7 months ago by andreiw
  1

• MSI_030 disallows virtual wire (no legacy PCI devices period?)

  #46 opened 7 months ago by andreiw
  3

• Clarify requirement for IOMMU

  #43 opened 7 months ago by jones-drew
  4

• Possibly missing SHOULD in SEC_040 (v0.1)

  #38 opened 9 months ago by andreabolognani
  1

• review comments - security (0.1)

  #37 opened 9 months ago by sfu5
  4

• Question regarding PCI Enhanced Allocation

  #36 opened 10 months ago by royfranz
  4

• brief review comments (0.1)

  #33 opened 10 months ago by sorear
  3

• Should add a reference to the RISC-V Security Model

  #29 opened a year ago by rsahita
  1

• Many requirements are out of scope with respect to the charter

  #20 opened a year ago by darius-bluespec
  4

• Rules around access to non-existent address space, DMA/hart access to memory?

  #25 opened a year ago by andreiw
  3

• IMSIC/MRIF memory regions

  #19 opened a year ago by dkruckemyer-ventana
  2

• SID_080: RCiEP MAY support the PCIe enhanced allocation (EA) capability for fixed allocation of memory resources.

  #22 opened a year ago by andreiw
  5

• PCIe Integration: do we need a rule about byte enable handling

  #23 opened a year ago by andreiw
  3

• PCIe integration: do we need rules around aligned writes?

  #24 opened a year ago by andreiw
  3

• SID_070: SoC-integrated PCIe devices MAY support programmable BAR registers.

  #21 opened a year ago by andreiw
  3

• Preserve port configuration registers in DL_Down status.

  #16 opened a year ago by ShawnLess
  2

• Standardize the UART in SoC

  #12 opened a year ago by ShawnLess
  3

• Memory Access Rules

  #13 opened a year ago by ShawnLess
  4