syntacore/scr1

I customize scr1_arch_description.svh but lots of assertion errors appear

validfox opened this issue · 1 comments

below snapshot shows the differences between my own svh file (on the left) and the orignal svh file in scr1 github code.

image

The failed assertions are all about SCR1_SVA_IFU_DRC_UNDERFLOW,
But the assertion failures aren't reported if I use one of the three recommended configurations. (tried SCR1_CFG_RV32IC_BASE or SCR1_CFG_RV32EC_MIN)

Could you please give me some advices or comments? Thanks you very much.

Hi @WufeiQ,

Thank you for patience. If it is still actual for you, could you please share more details?

  1. Please share your scr1_arch_description.svh
  2. Please share details about simulator (name, version and OS)

Thanks,
Alexander