mstatus register resets once the breakpoint hits

Question

mstatus register resets once the breakpoint hits

jyothishdevan opened this issue 9 months ago · 9 comments

While debugging the code, the mstatus register resets once the breakpoint hits.
In my case, I have enabled global interrupt hence the mie bit is 1 in the mstatus register. But after the breakpoint hits the mie bit becomes zero and the global interrupts disabled. So I didn't get any further interrupts after breakpoint hits.

Answer 1 · 2024-04-15T08:54:44.000Z

Hi @jyothishdevan,

Could you please add more details?

What kind of BP do you set: hardware or software?
And how do handle the breakpoint? (in application or via debugger)
Do you run on board or RTL-sim?

If you could have testcase to share, please let share it.

Best regards,
Alexander

Answer 2 · 2024-04-15T09:17:01.000Z

hi @achuykov-sc
Please see the details below

software breakpoint
I am debugging using J link. I am using segger ide
Run on board.

Answer 3 · 2024-04-15T10:00:58.000Z

Hi @jyothishdevan,

I did quick checks but with another adapter and GDG from SC-DT 2024.02. And there are no issues:

During interrupt handling the mstatus=0x1880 (MIE = 0) as expected
But after complete interrupt handler exit (in main function) the mstatus=0x1888 (MIE=1)

Could you please check that you are not disabling interrupt in handler? And please double check that your handler's last instruction is mret.

Best regards,
Alexander

Answer 4 · 2024-04-15T10:28:34.000Z

Hi @achuykov-sc
It is working as you have explained for the case of interrupts. But in my case, the mie bit becomes zero when the break point hits. In interrupt handler I am not disabling interrupt and mret is the last instruction in interrupt handler. I am keeps getting interrupts and runs interrupt handler if there is no breakpoint(or no breakpoint hits)

Thanks and regards,
Jyothish

Answer 5 · 2024-04-15T11:44:58.000Z

Hi @jyothishdevan,

Thanks for quick update. What is your SCR1 configuration?
And could you please clarify SEGGER Embedded Studio version?

I will try to run sample code on JLink within next days.

Best regards,
Alexander

Answer 6 · 2024-04-15T11:53:47.000Z

Hi @achuykov-sc
SCR1 configuration is RV32IC base
Segger embedded studio version 7.22

Thanks for the support
Regards,
Jyothish

Answer 7 · 2024-04-16T13:57:27.000Z

Hi @jyothishdevan,

I had tests with J-Link Ultra connected to FPGA, and it work fine. But I did tests with SC-DT GDB. If you could share Embedded Studio reproducer, I will double check.

Best regards,
Alexander

Answer 8 · 2024-04-17T04:06:01.000Z

Hi @achuykov-sc
I didn't understand what is meant by embedded studio reproducer?

Answer 9 · 2024-04-17T06:43:50.000Z

Hi @jyothishdevan,

Please apologize for unclarity. I mean the SEGGER Embedded Studio project which reproduces the issue. Are you able to share it?
Because I did not reproduce your issue on my setup.

BTW, please make sure that you correctly configure MTVEC register on boot (if you do this). In the BASE configuration the number of configurable bits in MTVEC is 16 by default. It means you can configure only high 16-bits of the register, but low 16-bit are fixed in hardware design.

Best regards,
Alexander