branch issue

[timdudu]

Hi,
In darkriscv.v, there are some issues in branch condition BMUX.

// J/B-group of instructions (OPCODE==7'b1100011)
wire BMUX = BCC==1 && (
FCT3==4 ? S1REG>=S2REG : // signed
FCT3==5 ? S1REG<=S2REG : // signed
FCT3==6 ? U1REG>=U2REG : // unsigned
FCT3==7 ? U1REG<=U2REG : // unsigned
FCT3==0 ? U1REG==U2REG :
FCT3==1 ? U1REG!=U2REG :
0);

FCT3==4 is BLT instruction. BLT takes the branch if rs1 is less than rs2. So it's should be FCT3==4 ? S1REG < S2REG : // signed
The same question when FCT3==5,6,7.
FCT3==5 ? S1REG >S2REG : // signed BGE
FCT3==6 ? U1REG<U2REG : // unsigned BLTU
FCT3==7 ? U1REG>U2REG : // unsigned BGEU

[hyf6661669]

@timdudu You are right, below are my codes:

wire BMUX = BCC & (
					//blt
					FCT3 == 4 ? S1REG < S2REG : // signed
					//bge
					FCT3 == 5 ? S1REG >= S2REG : // signed
					//bltu
					FCT3 == 6 ? U1REG < U2REG : // unsigned
					//bgeu
					FCT3 == 7 ? U1REG >= U2REG : // unsigned
					//beq
					FCT3 == 0 ? U1REG == U2REG : 
					//bne
					FCT3 == 1 ? U1REG != U2REG : 
					0);

It seems that @samsoniuk is not online these days....

[samsoniuk]

@timdudu : thank you for pointing the problem! Please feel free to send a pull request with your fix! :)
@hyf6661669 : thank you for the problem confirmation! I was not online because it is the last week of work before Christmas, but I hope next week I will return to the darkriscv development! :)

[samsoniuk]

@timdudu : I updated the core with your fix, thank you!