1loading1

1loading1's Stars

• commaai/openpilot

  openpilot is an operating system for robotics. Currently, it upgrades the driver assistance system on 275+ supported cars.

  Language:Python51.1k1.3k2.8k9.2k

• dibingfa/flash-linux0.11-talk

  你管这破玩意叫操作系统源码 — 像小说一样品读 Linux 0.11 核心代码

  Language:HTML20.4k387592.7k

• ufrisk/pcileech

  Direct Memory Access (DMA) Attack Software

  Language:C5.2k152286751

• open-sdr/openwifi

  open-source IEEE 802.11 WiFi baseband FPGA (chip) design: driver, software

  Language:C3.9k132346663

• alexforencich/verilog-ethernet

  Verilog Ethernet components for FPGA implementation

  Language:Verilog2.4k118170708

• corundum/corundum

  Open source FPGA-based NIC and platform for in-network compute

  Language:Verilog1.8k88174425

• SpinalHDL/SpinalHDL

  Scala based HDL

  Language:Scala1.7k81749336

• alexforencich/verilog-axi

  Verilog AXI components for FPGA implementation

  Language:Verilog1.6k5374461

• analogdevicesinc/hdl

  HDL libraries and projects

  Language:Verilog1.5k159901.5k

• alexforencich/verilog-pcie

  Verilog PCI express components

  Language:Verilog1.2k5251304

• alexforencich/verilog-axis

  Verilog AXI stream components for FPGA implementation

  Language:Python7534724230

• slack2450/csgo-dma-overlay

  A basic CS:GO ESP utilising DMA and HDMI-Overlay

  Language:C++745224181

• open-sdr/openwifi-hw

  open-source IEEE 802.11 WiFi baseband FPGA (chip) design: FPGA, hardware

  Language:Verilog7094369240

• WangXuan95/FPGA-USB-Device

  An FPGA-based USB 1.1 (full-speed) device core to implement USB-serial, USB-camera, USB-audio, USB-hid, etc. It requires only 3 FPGA common IOs rather than additional chips. 基于FPGA的USB 1.1 (full-speed) device端控制器，可实现USB串口、USB摄像头、USB音频、U盘、USB键盘等设备，只需要3个FPGA普通IO，而不需要额外的接口芯片。

  Language:Verilog6382823107

• WangXuan95/FPGA-FOC

  An FPGA-based Field Oriented Control (FOC) for driving BLDC/PMSM motor. 基于FPGA的FOC控制器，用于驱动BLDC/PMSM电机。

  Language:Verilog5781414179

• jhshi/openofdm

  Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

  Language:Verilog3862418193

• xupsh/pp4fpgas-cn-hls

  HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn

  Language:Jupyter Notebook23514179

• WangXuan95/FPGA-JPEG-LS-encoder

  An FPGA-based JPEG-LS encoder, which provides lossless and near-lossless image compression with high compression ratios. 基于FPGA的JPEG-LS编码器，可实现高压缩率的无损/近无损图像压缩。

  Language:Verilog2228744

• suisuisi/FPGA_Library

  Vivado诸多IP，包括图像处理等

  Language:VHDL1646142

• alexforencich/verilog-dsp

  Verilog digital signal processing components

  Language:Python1116137

• open-sdr/openofdm

  Sythesizable, modular Verilog implementation of 802.11 OFDM decoder.

  Language:Verilog10514075

• c1sc0/csgo-dma-overlay

  Language:C++680015

• alexforencich/corundum

  Open source FPGA-based NIC and platform for in-network compute

  Language:Verilog598013

• olofk/fifo

  Generic FIFO implementation with optional FWFT

  Language:Verilog557121

• h1kari/hpcore

  Hogge Phase EMFI Detector

  Language:Verilog15502

• freecores/8b10b_encdec

  8b10b Encoder/Decoder

  Language:VHDL7206

• kyoshiro1108/LinuxCNC-with-EtherCAT-Driver

  Language:C6304

• suisuisi/8b10b_encdec

  8b10b Encoder/Decoder

  61

• keqiao2017/AXI_Lite

  This is an Ip design for AXI_Lite including master and slave in Vivado 2016.4

  Language:Verilog4111

• FSlyne/ultrascale_datapath

  Language:VHDL2