UVM output with reuse_uvm_classes=true doesn't set backdoor paths correctly

[ebertland]

I have repeated instances of a register block instantiated in a top level register block. When reuse_uvm_classes=false, each instance of the repeated register block has its own class and the backdoor path is set using the corresponding define for that instance.

For example, this is written to the build method of register block block_top_ch31_csr:
set_hdl_path_root({`TOP_CH31_CSR_PIO_INSTANCE_PATH, ".pio_logic"});

When reuse_uvm_classes=true, the only class written out for all of these instances is block_top_ch00_csr, and it's build method has:
set_hdl_path_root({`TOP_CH00_CSR_PIO_INSTANCE_PATH, ".pio_logic"});

So all instances of this register block use channel 0's HDL path for backdoor accesses.

I see that calls to set_rdl_address_map_hdl_path are done per-instance from within the build method of the top-level register block. It's possible that I am not doing something correctly in the way that I use the backdoor path. Is there something extra in the uvm_reg_block_rdl base class that I should be using to get these paths mapped to the right HDL paths within the standard uvm_reg infrastructure?

For now, I am using reuse_uvm_classes=false, but I'd like to enable this feature because it reduces the UVM code significantly in my case.

[ebertland]

This fix works for us. Thanks!