AUCOHL/DFFRAM

Issues

• Add

  #193 opened 8 months ago by Bach-lang-Hayate
  0

• Support for 4R2W and up to 9000

  #192 opened a year ago by Dolu1990
  4

• unknown compression method 'zstd'

  #191 opened a year ago by b224hisl
  6

• "nix-shell" command's execution time

  #189 opened a year ago by Shehab-Naga
  4

• Create simulation models for DFFRAM

  #181 opened 2 years ago by xobs
  0

• Add support for 1R1W regfiles

  #180 opened 2 years ago by xobs
  1

• Silent crash in click.py

  #177 opened 2 years ago by xobs
  1

• LEC fails with yosys error

  #174 opened 2 years ago by antonblanchard
  2

• Add support to gf180mcu-pdk

  #160 opened 2 years ago by mohamedleithy
  1

• Document the difference between "DFFRAM Compiler" and "DFFRAM/OpenLane"

  #171 opened 2 years ago by xobs
  1

• Support 23-bit RAMs

  #172 opened 2 years ago by xobs
  0

• Is the colab broken?

  #156 opened 3 years ago by tcal-x
  6

• Very large max transition violations

  #148 opened 3 years ago by antonblanchard
  4

• Strange sort order with multiple read/write ports

  #151 opened 3 years ago by antonblanchard
  1

• Allow use of fixed ef_sc_ cells for li1 density rules.

  #149 opened 3 years ago by donnie-j
  0

• Documentation error?

  #146 opened 3 years ago by donnie-j
  2

• Row decoder logic messing up the placement of arrays where row size is a multiple of word size.

  #144 opened 3 years ago by donnie-j
  2

• dffram should allow pointing to a local openlane install

  #119 opened 3 years ago by proppy
  4

• Add demos of using the tool in Juypter notebooks / Google Colabs

  #130 opened 3 years ago by mithro
  3

• Some DFFRAM configurations have hold violations

  #139 opened 3 years ago by antonblanchard
  12

• Could DFFRAM instead use latches rather than flip flops?

  #140 opened 3 years ago by mithro
  4

• dffram.py fails at step STA

  #115 opened 3 years ago by andrsmllr
  2

• Add support for ASAP7 open source PDK

  #128 opened 3 years ago by mithro
  4

• Use Sphinx to create awesome documentation for the project

  #131 opened 3 years ago by mithro
  2

• Support generation of FIFO / ring buffer style memories for queues

  #129 opened 3 years ago by mithro
  1

• Small RAMs might not intersect all met5 power rails

  #122 opened 3 years ago by antonblanchard
  0

• Larger 64bit RAMs fail in global or detailed routing

  #109 opened 3 years ago by antonblanchard
  8

• 128x64 3R1W Register File for Microwatt

  #108 opened 3 years ago by antonblanchard
  3

• Technology Porting Instructions

  #103 opened 3 years ago by leochand101
  3

• create diagram for dffram placer algorithm

  #91 opened 3 years ago by ahmednofal
  0

• Global routing hits "Invalid 2D tree" error

  #110 opened 3 years ago by antonblanchard
  5

• obs_route step should take into account the margins to create the obstructions

  #125 opened 3 years ago by mbalestrini
  1

• Register file LVS difference caused by missing TIE?

  #124 opened 3 years ago by mbalestrini
  1

• LEF should be written from MAG/GDS

  #123 opened 3 years ago by mbalestrini
  0

• Move as much of the flow as possible to OpenLane

  #88 opened 3 years ago by donn
  0

• dffram should be exposed a regular python module

  #120 opened 3 years ago by proppy
  0

• row.py placing a tap cell does not correctly reset self.since_last_tap attribute

  #107 opened 3 years ago by mwongrivai
  0

• Placement optimisations

  #112 opened 3 years ago by antonblanchard
  2

• Tracks on met5

  #111 opened 3 years ago by antonblanchard
  1

• String error in dffram.py

  #96 opened 3 years ago by apond308
  4

• update lvs using magic due to magic netlist extraction update

  #84 opened 3 years ago by ahmednofal
  0

• Investigate Empty Space In Designs

  #87 opened 3 years ago by donn
  2

• Dual ported and single ported should have separate pin order config files.

  #95 opened 3 years ago by ahmednofal
  3

• Add end caps

  #92 opened 3 years ago by donn
  0

• Pin mismatch between LEF and Spice/GLNL

  #85 opened 3 years ago by donn
  3

• GDS Output?

  #94 opened 3 years ago by dan-fritchman
  4

• STA >= 256 fails

  #99 opened 3 years ago by donn
  0

• Create Script To Analyze Antenna Violations

  #86 opened 3 years ago by donn
  2

• Register File Not Working

  #97 opened 3 years ago by donn
  2

• insert diodes before each flip flop (dffram) for antenna violations

  #90 opened 3 years ago by ahmednofal
  1