pchdev's Stars
sickcodes/Docker-OSX
Run macOS VM in a Docker! Run near native OSX-KVM in Docker! X11 Forwarding! CI/CD for OS X Security Research! Docker mac Containers.
charmbracelet/vhs
Your CLI home video recorder 📼
quickemu-project/quickemu
Quickly create and run optimised Windows, macOS and Linux virtual machines
embassy-rs/embassy
Modern embedded framework, using Rust and async.
amber-lang/amber
💎 Amber the programming language compiled to Bash
TimelyDataflow/differential-dataflow
An implementation of differential dataflow using timely dataflow on Rust.
qjcg/awesome-typst
Awesome Typst Links
rust-lang/cc-rs
Rust library for build scripts to compile C/C++ code into a Rust library
pure-data/pure-data
Pure Data - a free real-time computer music system
google/xls
XLS: Accelerated HW Synthesis
andreasKroepelin/polylux
A package for creating slides in Typst
poac-dev/poac
A package manager and build system for C++
alexforencich/verilog-axis
Verilog AXI stream components for FPGA implementation
calyxir/calyx
Intermediate Language (IL) for Hardware Accelerator Generators
Jollywatt/typst-fletcher
Typst package for drawing diagrams with arrows, built on top of CeTZ.
llvm/clangir
A new (MLIR based) high-level IR for clang.
fabianschuiki/llhd
Low Level Hardware Description — A foundation for building hardware design tools.
bondagit/aes67-linux-daemon
AES67 Linux Daemon with configuration WebUI
chaosprint/asak
A cross-platform audio recording/playback CLI tool with TUI, written in Rust.
fabianschuiki/moore
A hardware compiler based on LLHD and CIRCT
gin66/tui-logger
Logger and Widget for rust's ratatui crate
probe-rs/rtt-target
Target side implementation of the RTT (Real-Time Transfer) I/O protocol
intel/mlir-extensions
Intel® Extension for MLIR. A staging ground for MLIR dialects and tools for Intel devices using the MLIR toolchain.
tree-sitter/tree-sitter-verilog
SystemVerilog grammar for tree-sitter
EPFL-LAP/dynamatic
DHLS (Dynamic High-Level Synthesis) compiler based on MLIR
sabbaghm/c-ll-verilog
An LLVM based mini-C to Verilog High-level Synthesis tool
corna/com.github.corna.Vivado
jpt13653903/tree-sitter-vhdl
A VHDL parser for syntax highlighting.
sletz/faust-sampler
somecho/csv-to-html
CLI to convert CSV to HTML Table