stnolting/neorv32

Issues

• [feature request] add *.f file to track all HDL files + compile order

  #830 opened 7 months ago
  10

• Possible SLINK RX FIFO overflow

  #826 opened 10 months ago
  3

• Vivado warnings/errors for SLINK AXI stream interface clocks

  #825 opened 10 months ago
  5

• Duplicate driver for s1_axis_tvalid_int in neorv32_SystemTop_axi4lite.vhd

  #823 opened 10 months ago
  2

• Possible issue with FIRQ pending interrupt clearing

  #818 opened 10 months ago
  14

• Simulation hangs

  #816 opened 10 months ago
  16

• c.srli HINT flagged as illegal

  #805 opened a year ago
  5

• hpmevent_cfg_t fails synthesis for hpm_num=0

  #801 opened a year ago
  5

• Compressed instruction decoder edge case not handled

  #796 opened a year ago
  3

• FPU more fflags issues and a few logic bugs

  #791 opened a year ago
  11

• ERR_EXE when uploading neorv32_exe.bin for demo_blink_led on DE2-115 Board

  #789 opened a year ago
  2

• Instruction to halt TRNG operation

  #787 opened a year ago
  2

• FPU fflags no being asserted correctly

  #785 opened a year ago
  15

• Reserved compressed instructions do not trigger illegal instruction exception

  #782 opened a year ago
  4

• Cannot upload neorv32_exe.bin for demo CFS on NexysA7

  #781 opened a year ago
  10

• CSR reads fail for un-implemented features like HPM counters

  #774 opened a year ago
  7

• Variation in counter values

  #773 opened a year ago
  16

• Illegal compressed instruction reports 2 traps.

  #770 opened a year ago
  7

• [idea] Add indirect CSR accesses (Smcsrind ISA extension)?

  #768 opened 10 months ago
  4

• Utilizing on-board SRAM

  #758 opened a year ago
  32

• Illegal instruction in coremark

  #757 opened a year ago
  5

• Implementation problem in XILINX ISE

  #756 opened a year ago
  2

• neorv32_fifo vivado implementation issue

  #753 opened 10 months ago
  13

• Atomic accesses documentation error

  #751 opened a year ago
  2

• Nexys 4 DDR FPGA board flashing zephyr RTOS hello_world no output on default UART

  #750 opened a year ago
  11

• Processor doesn't park itself in a know good state prior to going to sleep

  #744 opened a year ago
  3

• Configure Bootloader.c booting from address other than start of IMEM (Ex: 0x2000, etc)

  #732 opened a year ago
  2

• Clarification on Zfinx behavior for subnormal operands and results needed

  #728 opened 10 months ago
  17

• Implementation with nextpnr-xilinx + prjxray doesn't work.

  #726 opened a year ago
  5

• Application binary does not persist in FPGA

  #720 opened a year ago
  12

• Provide a neorv32_uart_vprintf function

  #710 opened a year ago
  5

• `make check` passes but `make bin` fails with pre-built toolchain

  #700 opened a year ago
  4

• Wishbone burst access

  #693 opened a year ago
  8

• JTAG Scan chain interrogation failed: all ones

  #688 opened a year ago
  14

• ISA Zfinx extension

  #668 opened a year ago
  8

• NEORV32 Multicore processor TMR implementation

  #663 opened a year ago
  22

• Failed uploading binary executable image via UART

  #662 opened a year ago
  16

• Multi-driven Pin Vivado Error: what causes it and how to solve it?

  #655 opened a year ago
  12

• Rework bus system and memory map

  #647 opened a year ago
  2

• feature request - Zb* sub-extensions

  #640 opened 7 months ago
  4

• feature request - support for Zc* extensions

  #633 opened 4 months ago
  12

• feature request -- compact address space support in the CPU complex

  #629 opened 2 years ago
  2

• Random errors occuring with code that is not being executed (!!??)

  #623 opened 2 years ago
  9

• Strange TRAP in strange circumstances

  #621 opened 2 years ago
  1

• OrangeCrab - Bootloader + OCD won't work

  #602 opened a year ago
  13

• basic DMA transfer failing on iCEBreaker -- possible bus contention issues

  #600 opened 2 years ago
  8

• synthesis tool error when IO_DMA_EN => true

  #597 opened 2 years ago
  7

• 🐛 Potential rtl error in xirq

  #584 opened 2 years ago
  1

• 🐛 WFI instruction with global interrupts disabled

  #583 opened 2 years ago
  0

• LiberoSoC Microsemi FPGAs: unable to use DMEM lower than 4KB

  #580 opened a year ago
  8